qos — Quality of Service Memory Policies

Overview

The qos/ directory provides a QoS framework for gem5 memory controllers. It sits between the Cache Hierarchy | gem5 Wiki" href="../cache/index.html">cache hierarchy and the DRAM/NVM backend, enabling differentiated memory service based on requestor identity, priority, or fairness objectives.

The framework consists of three key abstractions:

• QoS Memory System | gem5 Wiki" class="xref">MemCtrl — QoS-aware memory controller base class that integrates policies into the scheduling pipeline
• QoS Policy — Priority assignment algorithm (Fixed Priority, Proportional Fair)
• Turnaround Policy — Read/write bus direction switching policy
• Queue Policy — Per-requestor queue management and admission control

Architecture

flowchart TD
    CPU0["CPU 0\n(Requestor 0)"]
    CPU1["CPU 1\n(Requestor 1)"]
    GPU["GPU\n(Requestor 2)"]
    CACHE["Cache Hierarchy"]
    XBAR["Coherent XBar"]
    QMC["QoS MemCtrl"]

    subgraph QoS_Pipeline["QoS Pipeline"]
      POLICY["Priority Policy\n(FixedPrio / PF)"]
      QPOL["Queue Policy\n(Admission Control)"]
      SCHED["Request Scheduler"]
      TP["Turnaround Policy"]
    end

    READQ["Read Queue"]
    WRITEQ["Write Queue"]
    DRAM["DRAM Interface"]

    CPU0 --> CACHE
    CPU1 --> CACHE
    GPU --> CACHE
    CACHE --> XBAR
    XBAR --> QMC
    QMC --> POLICY
    POLICY --> QPOL
    QPOL --> SCHED
    SCHED --> TP
    TP --> READQ
    TP --> WRITEQ
    READQ --> DRAM
    WRITEQ --> DRAM
  

QoS Request Flow

sequenceDiagram
    participant REQ as Requestor
    participant MC as QoS MemCtrl
    participant POL as Policy
    participant QP as Queue Policy
    participant TP as Turnaround Policy
    participant DRAM as DRAM

    REQ->>MC: Memory Request (pkt)
    MC->>POL: schedule(requestorId, pkt)
    POL-->>MC: priority level
    MC->>QP: enqueue(pkt, priority)
    QP-->>MC: accepted / rejected
    Note over MC: Request placed in
priority-ordered queue
    MC->>TP: selectBusState()
    TP-->>MC: READ or WRITE
    MC->>DRAM: issue(pkt)
    DRAM-->>MC: response
    MC-->>REQ: Response (pkt)
  

Narrated Walkthrough: QoS-Aware Memory Access

Key Classes Reference

Scheduling Policies Deep Dive

Fixed Priority Policy

The simplest QoS policy: each requestor has a statically configured priority level. The memory controller always serves higher-priority requestors first.

flowchart LR
    REQ["Incoming Request"]
    MAP["Priority Map\n(requestorId → priority)"]
    PRI["Assigned Priority"]
    Q["Priority Queue"]

    REQ --> MAP
    MAP --> PRI
    PRI --> Q

    MAP -.- CFG["Configuration:\nCPU0 → 3 (high)\nCPU1 → 2\nGPU → 1 (low)"]
  

Characteristics:

• Zero runtime overhead — priority is a table lookup
• Deterministic behavior — easy to reason about
• Risk of starvation for low-priority requestors under heavy load
• Best for: systems with well-defined priority hierarchies (e.g., real-time CPU over background GPU)

Proportional Fair Policy

A dynamic policy inspired by wireless networking's proportional fair scheduling. Each requestor's priority is inversely proportional to its recent bandwidth consumption.

flowchart TD
    REQ["Incoming Request"]
    HIST["Bandwidth History\n(per requestor)"]
    SCORE["Score = Weight / Recent_BW"]
    RANK["Rank by Score"]
    PRI["Priority Assignment"]

    REQ --> HIST
    HIST --> SCORE
    SCORE --> RANK
    RANK --> PRI
  

Characteristics:

• Adapts to changing workload behavior at runtime
• Prevents starvation — underserved requestors naturally receive higher priority
• Configurable weight per requestor to bias the "fair share"
• Tracks bandwidth over a sliding time window
• Best for: multi-tenant workloads where fairness matters

Turnaround Policy

DRAM bus direction switching is expensive (typically 5-15ns turnaround penalty). The turnaround policy batches reads and writes to minimize switches:

• IdealTurnaround — Switches only when the current direction's queue is empty or a high-priority request in the other direction is waiting. Minimizes turnaround count.
• Custom policies can implement hysteresis, threshold-based switching, or age-based urgency.

Queue Management

The QueuePolicy controls how requests are admitted into and ordered within the memory controller's queues:

QoS Statistics

The QoS framework collects detailed per-requestor statistics:

Configuration Examples

// Python configuration: Fixed Priority QoS
system.mem_ctrl = MemCtrl(
    dram = DDR4_2400_16x4(),
    qos_policy = QoSFixedPriority(
        # CPU cores get high priority, GPU gets low
        qos_priorities = {
            'system.cpu0': 3,
            'system.cpu1': 3,
            'system.gpu':  1,
            'system.dma':  0
        }
    ),
    qos_turnaround_policy = QoSIdealTurnaround()
)

// Python configuration: Proportional Fair QoS
system.mem_ctrl = MemCtrl(
    dram = DDR4_2400_16x4(),
    qos_policy = QoSPropFairPolicy(
        # Weight each requestor's fair share
        weight = {
            'system.cpu0': 2.0,   # Double share
            'system.cpu1': 1.0,   # Normal share
            'system.gpu':  0.5    # Half share
        },
        # Sliding window for bandwidth tracking
        scoring_interval = '10us'
    ),
    qos_turnaround_policy = QoSIdealTurnaround()
)

// C++ internals: Policy interface
namespace qos {

class Policy : public SimObject {
  public:
    // Called for each incoming memory request
    // Returns priority level (0 = lowest, N = highest)
    virtual uint8_t schedule(const RequestorID id,
                             const uint64_t data) = 0;
};

class FixedPriorityPolicy : public Policy {
    // priority_map: RequestorID -> priority level
    std::map<RequestorID, uint8_t> priority_map;

  public:
    uint8_t schedule(const RequestorID id,
                     const uint64_t data) override {
        auto it = priority_map.find(id);
        return (it != priority_map.end()) ? it->second : 0;
    }
};

} // namespace qos

Cross-Module Connections

flowchart LR
    subgraph Cache["mem/cache/"]
      BC["BaseCache"]
    end
    subgraph QoS["mem/qos/"]
      QMC["qos::MemCtrl"]
      POL["qos::Policy"]
      TP["TurnaroundPolicy"]
      QP["QueuePolicy"]
    end
    subgraph MemCtrl["mem/"]
      MC["MemCtrl"]
      DI["DRAMInterface"]
    end
    subgraph Core["sim/"]
      CO["ClockedObject"]
    end

    CO --> QMC
    QMC --> POL
    QMC --> TP
    QMC --> QP
    BC -->|"Writeback / Miss"| QMC
    QMC --> MC
    MC --> DI
  

The QoS framework integrates at the memory controller level:

• Upstream: Receives requests from the cache hierarchy via ResponsePort
• Policies: Pluggable policy objects attached to the controller
• Downstream: Issues scheduled requests to DRAMInterface or NVMInterface
• Base class: qos::MemCtrl extends ClockedObject and can be used as a base for custom memory controllers

Configuration Reference

Directory Map

Glossary